This is a heavily condensed version of my resume, listing just some highlights. Please contact me if you need a more full resume for any reason. I have done plenty of other exciting and interesting things in the recent past, and I also recommend having a look at my projects page if you want to see a wider selection of things I've worked on.
I'm available for hire through my consultancy, Accelerated Tech. Jamey and I would be excited to work with you on projects of any size and complexity -- please get in touch!
The basics¶
- Joshua Wise, Accelerated Tech, Inc.
- Based in Mountain View, CA
- https://www.joshuawise.com/
- joshua+resume@joshuawise.com
- LinkedIn: yes, grudgingly
Objective¶
Seasoned computer engineer looking to help you with your design, architecture, and implementation challenges at all scales. I bring a wide breadth of knowledge with me, including digital logic design, circuit board and mechanical design, low-level software implementation (down to the register- and gate-level), digital imaging algorithms, userland software, and building user interfaces to interact with it all; in my decades of experience, I have developed a substantial depth in each of these areas.
I work best when I am using both my breadth and depth of knowledge on your most complex problems, by helping you clarify, simplify, understand, and ultimately solve them the right way. I am not afraid to get my hands dirty, and I am always excited to learn something new. I look forward to working with you.
Accomplishments¶
- Specified, designed, and lead execution for imaging and compute subsystems of connected dashcam product; served as electrical team point of contact with Dongguan-based contract manufacturer during successful ramp to production during COVID
- Architected, specified, and validated prototype of solar-powered LTE-connected telematics product, including power supply subsystem and radio subsystem
- Brought first-of-its-kind mobile session analytics library on iOS from early prototype to widely-deployed production-quality platform, including deep system reverse engineering, and power-, performance-, and privacy-sensitive implementaiton
- Achieved sub-20mW implementation of low-power wake detection CNN on Efinix Trion T20 FPGA for first-of-its-kind wearable
- Lead architect for Video Input subsystem on NVIDIA Tegra, including one patent on memory-bandwidth reduction technology and one patent on sparse scanout for image sensors
- Reverse engineered boot sequence and built custom firmware for popular 3D printer, with customizations including enhanced privacy features, network remote access, improved WiFi drivers, screen guard.
- Designed, prototyped, and successfully executed crowdfunding project to manufacture hardware expansion for popular 3D printer with Ethernet, USB, GPIO interfaces, and optional add-on modules for camera shutter release and programmable LEDs.
- Many more other than those -- see my projects page for even more interesting things
Areas of Expertise¶
- Camera / digital imaging systems (MIPI CSI; MIPI D-PHY; image signal processing; camera module specification and manufacturing)
- Digital logic design (Verilog; Migen / LiteX; design for both ASIC and FPGA environments, and particular specialization in Efinix Trion and Titanium FPGA architectures; SoC integration of IPs into fabric)
- Embedded system development (bootloader and driver development; kernel hacking on Linux and FreeRTOS; experience with ARM32, AArch64, RISC-V, and x86 low-level platform details)
- Rapid prototyping (quick-turn PCB design; mechanical design around both in-house FDM manufacturing and external processes; extensive rework capability)
- Cross-cultural supply chain (navigating Shenzhen manufacturing ecosystem; sourcing across both Western and Eastern manufacturers)
- Reverse engineering (binary patching programs without source available; competitive analysis on hardware and software)
Professional experience¶
- Accelerated Tech, Inc., Mountain View, CA; senior engineer and vice president; 2018 - present
- NVIDIA Corporation, Santa Clara, CA; ASIC engineer, and subsequently senior imaging systems architect, 2011 - 2018
- Tilera Corporation, Westborough, MA; all-purpose intern, 2010
- Cavium Networks, Inc., Marlborough, MA; RTL intern, 2009; firmware intern, 2008
- Google, Inc., Mountain View, CA; software engineering intern, 2007
- SiCortex, Inc., Maynard MA; software engineering intern, 2005 - 2006
- Laminar Research; lead Linux programmer, 2003 - 2007
Speaking experience¶
- "From "No Way" to 0-day: Weaponizing the Unweaponizable" (presented at DEF CON 18, 2010)
- "Recovering data from an SD card -- the hard way!" (presented at !!Con 2015)
- "Understanding the automotive imaging data flow" (presented at Image Sensors Auto Americas 2016)
- "Screwing up is easier than ever before!" (presented at !!Con 2020)
- "Exploring Low Power LTE the Fun Way: Without Knowing Anything!" (presented at Crowd Supply Teardown 2023)
- "X1Plus: A Tour of Shenanigans" (presented at Hackaday Supercon 2024)
- "The Unreasonable Effectiveness of the Fourier Transform" (presented at Crowd Supply Teardown 2025)
Publications¶
- Sparse scanout for image sensors. US Patent 11,039,092
- System and method for pixel data compression. US Patent 9,232,238
- Asymmetry-aware execution placement on manycore chips. Alexey Tumanov, Joshua Wise, Onur Mutlu, Gregory R. Ganger. In Proc. of the 3rd Workshop on Systems for Future Multicore Architectures (SFMA'13), EuroSys'13, April 2013. (PDF)
- NetWatch: System Management Modeis not just for Governments. Joshua Wise, Jacob Potter. In PoC || GTFO 0x03, March 2014.
Volunteer service¶
-
Exclamation Foundation
- President of the Board of Directors, 2021 - 2024
- Organized !!Con West 2018, !!Con West 2019, !!Con 2021, !!Con 2022, and !!Con 2024
-
Rebble Foundation
- Treasurer, 2024 - present
- Board member, 2024 - present
- Day-to-day operations for Rebble Web Services
Education¶
- Carnegie Mellon University, Pittsburgh, PA: Electrical and Computer Engineering, 2007 -- 2011
- Graduated with M.S. and B.S.
- 'A' grade in 15-410, Operating System Design and Impl. (F'07); 15-411, Compiler Design (F'08); 15-412, O.S. Practicum (F'08); and 18-447, Computer Architecture (S'09), among others...
- TAed 15-410 (and did I ever... F'08, S'09, F'09, S'10, F'10, S'11) and 18-447 (S'11).
Extracurricular interests¶
- Occasional mechanical engineer, moderately competent with Onshape; proficient with various additive manufacturing technologies (FDM; SLS; and various DMLS metals, including titanium)
- Seasoned and mediocre cyclist, perpetually racing in the novice field in cyclocross races and getting killed, but still having fun anyway
- Enjoys spending time climbing both plastic rocks in a gym, and occasionally real rocks outside (on both technical and non-technical terrain)
- For better or for worse, seemingly incapable of saying no to a hobby project that will inevitably run tens or hundreds of hours